1. Field
Embodiments relate to mechanisms for task queuing and dispatching in a computational device.
2. Background
A storage system may control access to storage for one or more host computational devices that may be coupled to the storage system over a network. A storage management application that executes in the storage system may manage a plurality of storage devices, such as disk drives, tape drives, flash drives, direct access storage devices (DASD), etc., that are coupled to the storage system. A host may send Input/Output (I/O) commands to the storage system and the storage system may execute the I/O commands to read data from the storage devices or write data to the storage devices.
The storage system may include two or more servers, where each server may be referred to as a node, a storage server, a processor complex, a Central Processor Complex (CPC), or a Central Electronics Complex (CEC). Each server may be included in a cluster. Each server may have a plurality of processor cores and the servers may share the workload of the storage system. In a two server configuration of the storage system, either server can failover to the other if there is a failure or a planned downtime for one of the two servers. For example, a first server may failover to the other is there is a failure of a second server.
A computational device, such as a host or a server of storage system, may include a plurality of processors and form a multiprocessing system. Non-uniform memory access (NUMA) is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to the processor. Under NUMA, a processor may access its own local memory faster than non-local memory (memory local to another processor or memory shared between processors). The benefits of NUMA may be limited to particular workloads, notably on servers where the data is often associated strongly with certain tasks or users. A task control block (TCB) is a data structure in an operating system or some other control program that includes the information needed to manage a particular process or a plurality of processes.
U.S. Patent Publication 2014/0026141 discusses a multicore processor system and at least discusses dispatch queues associated with task control blocks. U.S. patent publication 2011/0107344 at least discusses a multi-core processor system which provides a method for load balancing. U.S. Pat. No. 9,058,217 at least discusses a preferential central processing unit (CPU) utilization for tasks, in which a set of like tasks to be performed is organized into a first group. Upon a determined imbalance between dispatch queue depths greater than a predetermined threshold, the set of like tasks is reassigned to an additional group.